1. Field of the Invention
The present invention relates to an organic electroluminescent display device, and more particularly, to an organic electroluminescent display device having a lengthened life time and a stability in operation and a driving method thereof.
2. Discussion of the Related Art
Among flat panel displays (FPDs), organic electroluminescent (EL) devices have been of particular interest in research and development because they are self-light-emitting type displays having a wide viewing angle as well as a high contrast ratio in comparison to liquid crystal display (LCD) devices. Organic EL devices are lightweight and small, as compared to other types of display devices, because they do not need a backlight. Organic EL devices have other desirable characteristics, such as low power consumption, superior brightness and fast response time. When driving the organic EL devices, only a low direct current (DC) voltage is required. Moreover, a fast response time can be obtained.
Unlike LCD devices, organic EL devices are entirely formed in a solid phase arrangement. Thus, organic EL devices are sufficiently strong to withstand external impacts and also have a greater operational temperature range. Moreover, organic EL devices are fabricated in a relatively simple process involving few processing steps. Thus, it is much cheaper to produce an organic EL device in comparison to an LCD device or a plasma display panel (PDP). For example, only deposition and encapsulation processes are necessary for manufacturing organic EL devices. An organic EL device is often referred to as an organic light emitting diode (OLED).
There are two types of organic EL display devices: passive matrix type and active matrix type. While both the passive matrix organic EL display device and the active matrix organic EL display device have simple structures and are formed by a simple fabricating process, the passive matrix organic EL display device requires a relatively high amount of power to operate. In addition, the display size of a passive matrix organic EL display device is limited by its structure. Furthermore, as the number of conductive lines increases, the aperture ratio of a passive matrix organic EL display device decreases.
In contrast, active matrix organic EL display devices are highly efficient and can produce a high-quality image for a large display size with a relatively low power. In general, in an active matrix type organic EL device, a voltage controlling a current applied to a pixel is stored in a storage capacitor. Accordingly, the voltage in the storage capacitor can be applied to the pixel until a next frame and the pixel can continuously display an image during one frame. As a result, an active matrix type organic EL device has a low power consumption, a high resolution and a large display size because it can display images with a constant brightness even with a low driving current.
FIG. 1 is a circuit diagram showing an organic electroluminescent display device according to the related art. In FIG. 1, an organic electroluminescent display (ELD) device includes a plurality of gate lines “S1” to “Sm” and a plurality of data lines “D1” to “Dn.” Each gate line crosses each data line, thereby defining a pixel region. Each pixel region includes a first positive (P) type transistor “P1,” a storage capacitor “C1,” a second P type transistor “P2” and an organic electroluminescent (EL) diode “OEL.” The first and second P type transistors function as switching and driving elements for the organic ELD device “OEL,” respectively.
In particular, a gate electrode and a source electrode of the first P type transistor “P1” are respectively connected to a corresponding one of the gate lines “S1” to “Sm” and to a corresponding one of the data lines “D1” to “Dn.” The storage capacitor “C1” is connected to a drain electrode of the first P type transistor “P1” and a source voltage “Vdd.” A gate electrode of the second P type transistor “P2” is connected to the drain electrode of the first P type transistor “P1.” In addition, a source electrode and a drain electrode of the second P type transistor “P2” are connected to the source voltage “Vdd” and the organic EL diode “OEL,” respectively.
When a gate signal of a low level voltage is applied to the gate line, the first P type transistor “P1” is turned on and the storage capacitor “C1” is charged up by the source voltage “Vdd” according to a data signal applied to the second P type transistor “P2” through the first P type transistor “P1.” A quantity of a current passing through the second P type transistor “P2” is determined by a voltage stored in the storage capacitor “C1” and the organic EL diode “OEL” emits light according to the current quantity. Further, the gate lines “S1” to “Sm” are sequentially enabled, and the data signals are applied to the pixel regions corresponding to the enabled gate line through the data lines “D1” to “Dn.”
However, the current flows through the organic EL diode “OEL” only along one direction. As a result, the organic EL diode “OEL” is deteriorated due to a direct current (DC) current and a lifetime of the organic EL diode “OEL” is shortened.
FIG. 2 is a circuit diagram showing another organic electroluminescent display device according to the related art. In FIG. 2, an organic electroluminescent display (ELD) device includes a plurality of gate lines “S1” to “Sm” and a plurality of data lines “D1” to “Dn.” Each gate line crosses each data line, thereby defining a pixel region. Each pixel region includes a first negative (N) type transistor “N1,” a storage capacitor “C2,” a second N type transistor “N2,” a third transistor “P3,” which is a P-type transistor, and an organic electroluminescent (EL) diode “OEL.” The first transistor “N1” functions as a switching element for the organic ELD device, and the second and third transistors “N2” and “P3” function as driving elements for the organic ELD device.
A gate electrode and a drain electrode of the first transistor “N1” are respectively connected to a corresponding one of the gate lines “S1” to “Sm” and to a corresponding one of the data lines “D1” to “Dn.” The storage capacitor “C2” is connected to a source electrode of the first transistor “N1” and a first voltage “V1.” A gate electrode of the third transistor “P3” is connected to the source electrode of the first transistor “N1.” In addition, a source electrode and a drain electrode of the third transistor “P3” are connected to a source voltage “Vdd” and the organic EL diode “OEL,” respectively. A gate electrode of the second transistor “N2” is connected to the source electrode of the first transistor “N1.” Further, a source electrode and a drain electrode of the second transistor “N2” are connected to the first voltage “V1” and the organic EL diode “OEL,” respectively. The organic EL diode “OEL” is connected to a ground voltage “Vcom.” The ground voltage “Vcom” is lower than the source voltage “Vdd.”
FIG. 3 is a schematic timing chart showing a method of driving the organic electroluminescent display device shown in FIG. 2. As shown in FIG. 3, a plurality of gate signals “VS1” to “VSm” sequentially have a high level voltage pulse during one horizontal scan time period “1H.” Thus, the gate lines “S1” to “Sm” (of FIG. 2) are sequentially enabled by the gate signals “VS1” to “VSm.” In particular, when the high level voltage pulse is applied to a corresponding one of the gate lines “S1 ” to “Sm” (of FIG. 2), the first transistors “N1” (of FIG. 2) connected to the corresponding gate line are turned on and first data signals are applied to the plurality of data lines “D1” to “Dn” (of FIG. 2). Next, the first transistors “N1” (of FIG. 2) connected to the next gate line are turned on and second data signals are applied to the plurality of data lines “D1” to “Dn” (of FIG. 2). Although not shown, the first voltage “V1” is fixed and remains the same during the operation.
For example, when the first gate line “S1” (of FIG. 2) is enabled during one horizontal scan time period “1H,” the first transistors “N1” (of FIG. 2) connected to the first gate line “S1” (of FIG. 2) are turned on and the first data signal “VD11” for the first data line “D1” (of FIG. 2) is input to the first transistor “N1” (of FIG. 2) connected to the first data line “D1” (of FIG. 2). The first data signal “VD11” for the first data line “D1” (of FIG. 2) has a high level voltage during a first sub-period of the one horizontal scan time period “1H” and a low level voltage during a second sub-period of the one horizontal scan time period “1H.”
In addition, a difference between the high level voltage of the first data signal “VD11” and the first voltage “V1” (of FIG. 2) is higher than a threshold voltage of the second transistor “N2” (of FIG. 2), and a difference between the high level voltage of the first data signal “VD11” and the source voltage “Vdd” (of FIG. 2) is lower than a threshold voltage of the third transistor “P3” (of FIG. 2). Thus, during the first sub-period of the one horizontal scan time period “1H,” the high level voltage of the first data signal “VD11” for the first data line “D1” (of FIG. 2) is applied to the second and third transistors “N2” and “P3” (of FIG. 2) through the first transistor “N1” (of FIG. 2), such that the second transistor “N2” (of FIG. 2) is turned on and the third transistor “P3” is turned off. Further, since the first voltage “V1” (of FIG. 2) is lower than the ground voltage “Vcom” (of FIG. 2), a reverse bias is applied to the organic EL diode “OEL” (of FIG. 2). As a result, the organic EL diode “OEL” (of FIG. 2) is reset by the reverse bias during the first sub-period of the one horizontal scan time period “1H,” and this process may be referred to as an aging for preventing a deterioration of an organic EL diode due to a direct current (DC) bias.
Moreover, a difference between the low level voltage of the first data signal “VD11” and the first voltage “V1” (of FIG. 2) is lower than a threshold voltage of the second transistor “N2” (of FIG. 2), and a difference between the low level voltage of the first data signal “VD11” and the source voltage “Vdd” (of FIG. 2) is higher than a threshold voltage of the third transistor “P3” (of FIG. 2). Thus, during the second sub-period of the one horizontal scan time period “1H,” the low level voltage of the first data signal “VD11” for the first data line “D1” (of FIG. 2) is applied to the second and third transistors “N2” and “P3” (of FIG. 2) through the first transistor “N1” (of FIG. 2), such that the second transistor “N2” (of FIG. 2) is turned off and the third transistor “P3” is turned on. Further, since the source voltage “Vdd” (of FIG. 2) is higher than the ground voltage “Vcom” (of FIG. 2), the organic EL diode “OEL” (of FIG. 2) emits light by a forward bias between the source voltage “Vdd” (of FIG. 2) and the ground voltage “Vcom” (of FIG. 2).
Therefore, the organic EL diode “OEL” (of FIG. 2) is reset by the reverse bias during the first sub-period of the one horizontal scan time period “1H,” and emits light by the forward bias during the second sub-period of the one horizontal scan time period “1H.” However, during the operation of the organic EL diode “OEL” (of FIG. 2), the storage capacitor “C2” (of FIG. 2) connected to the first voltage “V1” (of FIG. 2) functions as a load while the first voltage “V1” (of FIG. 2) is applied to the organic EL diode “OEL” (of FIG. 2). Accordingly, an operation speed is reduced and a power consumption increases, thereby reducing an aging efficiency.